Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors

Research output: Contribution to book/conference proceedings/anthology/reportConference contributionContributedpeer-review

Contributors

Abstract

Reconfigurable transistors are a new emerging type of device, which offer the promise to improve the resistance of electronic components against know-how theft. In order to enable a product development of such an emerging device, a cross-layer design enablement strategy is needed, as emerging technologies are not necessarily compatible withstandard tools used in the industry. In 'CirroStrato', we aim on the development of such a complete flow enabling CMOS co-integration of reconfigurable transistors, ranging from process adjustments, device modeling, library characterization, physical and logical synthesis up towards sophisticated hardware security tests. In this multi-partner-project (MPP) paper, our aim is to elucidate the overall design enablement flow, as well as current research challenges on the individual stages.

Details

Original languageEnglish
Title of host publication2023 Design, Automation and Test in Europe Conference and Exhibition, DATE 2023 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (electronic)9783981926378
ISBN (print)979-8-3503-9624-9
Publication statusPublished - 2023
Peer-reviewedYes

Publication series

SeriesDesign, Automation and Test in Europe Conference and Exhibition (DATE)
ISSN1530-1591

Conference

Title2023 Design, Automation and Test in Europe Conference and Exhibition
Abbreviated titleDATE 2023
Duration17 - 19 April 2023
Website
Degree of recognitionInternational event
LocationFlanders Meeting & Convention Center Antwerp
CityAntwerp
CountryBelgium

External IDs

ORCID /0000-0003-3814-0378/work/142256366

Keywords

ASJC Scopus subject areas

Keywords

  • CMOS co-integration, EDA, Emerging devices, hardware security, modelling, reconfigurable circuits