Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors
Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten › Beitrag in Konferenzband › Beigetragen › Begutachtung
Beitragende
Abstract
Reconfigurable transistors are a new emerging type of device, which offer the promise to improve the resistance of electronic components against know-how theft. In order to enable a product development of such an emerging device, a cross-layer design enablement strategy is needed, as emerging technologies are not necessarily compatible withstandard tools used in the industry. In 'CirroStrato', we aim on the development of such a complete flow enabling CMOS co-integration of reconfigurable transistors, ranging from process adjustments, device modeling, library characterization, physical and logical synthesis up towards sophisticated hardware security tests. In this multi-partner-project (MPP) paper, our aim is to elucidate the overall design enablement flow, as well as current research challenges on the individual stages.
Details
Originalsprache | Englisch |
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Titel | 2023 Design, Automation and Test in Europe Conference and Exhibition, DATE 2023 - Proceedings |
Herausgeber (Verlag) | Institute of Electrical and Electronics Engineers Inc. |
ISBN (elektronisch) | 9783981926378 |
ISBN (Print) | 979-8-3503-9624-9 |
Publikationsstatus | Veröffentlicht - 2023 |
Peer-Review-Status | Ja |
Publikationsreihe
Reihe | Design, Automation and Test in Europe Conference and Exhibition (DATE) |
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ISSN | 1530-1591 |
Konferenz
Titel | 2023 Design, Automation and Test in Europe Conference and Exhibition |
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Kurztitel | DATE 2023 |
Veranstaltungsnummer | 26 |
Dauer | 17 - 19 April 2023 |
Webseite | |
Bekanntheitsgrad | Internationale Veranstaltung |
Ort | Flanders Meeting & Convention Center Antwerp |
Stadt | Antwerp |
Land | Belgien |
Externe IDs
ORCID | /0000-0003-3814-0378/work/142256366 |
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Schlagworte
ASJC Scopus Sachgebiete
Schlagwörter
- CMOS co-integration, EDA, Emerging devices, hardware security, modelling, reconfigurable circuits