In this paper, the analysis of the board level reliability of a Radar package continuously studied in parallel to its progressing design development will be presented. In general, the studied Radar package follows the concept of an interposer-like antenna board, carrying the Radar antenna patch but also connecting the Radar device to the PCB in BGA manner. The signal processor and antenna driver ICs are packaged in a fan-out wafer level package that is assembled to the antenna board as a BGA land side package. The board level reliability of the Radar device was investigated considering variations of the package design and package and interconnect materials. Test conditions were selected in conformance to the AEC-Q100 standard for board level reliability testing. Intermediate electrical read-outs were executed to monitor the sample health including the check of single I/Os at different I/O locations with regard to the BGA grid. As of now, all antenna board configurations were tested for at least 1,000 temperature shock test cycles. Selected configurations reached 3,000 cycles. In these tests, Radar demonstrator samples achieved a characteristic TCoB life of more than 2,000 cycles. Solder fatigue behaviour was found to be the root failure cause.