Wire resistance impact and compensation methods in analog switching 1R memristive crossbar arrays

Research output: Contribution to journalResearch articleContributedpeer-review

Contributors

Abstract

This paper discusses the integration of a highly scalable and interfacial switching, multi-bit Ti/Al2O3/NbOx/Ti bi-layer memristor stack in the 3 × 3 passive crossbar array. In conjunction with wire resistance, impact and methodologies are discussed to enhance voltage delivery for effective two-bit vector matrix multiplication. Finally, parameter tuning strategies for dynamic program and erase of the cells by pulsed VDD/2 and VDD/3 schemes to realize multi-bit vector matrix multiplication are presented.

Details

Original languageEnglish
Article number109381
JournalSolid-state electronics
Volume236
Publication statusPublished - Oct 2026
Peer-reviewedYes

Keywords

Keywords

  • 1R crossbar array, Analog switching, Dynamic measurements, Interfacial switching, Memristor, VMM, Wire resistance