This paper discusses the integration of a highly scalable and interfacial switching, multi-bit Ti/Al₂O₃/NbOx/Ti bi-layer memristor stack in the 3 × 3 passive crossbar array. In conjunction with wire resistance, impact and methodologies are discussed to enhance voltage delivery for effective two-bit vector matrix multiplication. Finally, parameter tuning strategies for dynamic program and erase of the cells by pulsed V_DD/2 and V_DD/3 schemes to realize multi-bit vector matrix multiplication are presented.