The future of charge trapping memories

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • T. Mikolajick - , Freiberg University of Mining and Technology (Author)
  • M. Specht - , Qimonda Dresden GmbH and Co. OHG (Author)
  • N. Nagel - , Qimonda Dresden GmbH and Co. OHG (Author)
  • T. Mueller - , Qimonda Dresden GmbH and Co. OHG (Author)
  • S. Riedel - , Qimonda Dresden GmbH and Co. OHG (Author)
  • F. Beug - , Qimonda Dresden GmbH and Co. OHG (Author)
  • T. Melde - , Qimonda Dresden GmbH and Co. OHG (Author)
  • K. H. Küsters - , Qimonda Dresden GmbH and Co. OHG (Author)

Abstract

With floating gate memory cells running into scaling limitations caused by reduced gate coupling and excessive floating gate interference, charge trapping in its two variants multi bit charge trapping and charge trapping NAND is the most promising technology for the mid term. For NOR type applications also Phase change RAM could appear as a competitor in a few years, but some considerable development is still down the road. Concepts to challenge NAND type applications are still in the early stage. Therefore charge trapping is expected to be the technology of choice for code storage in the short to mid term and for data storage in the mid term timeframe.

Details

Original languageEnglish
Title of host publication2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers
Publication statusPublished - 2007
Peer-reviewedYes
Externally publishedYes

Publication series

SeriesInternational Symposium on VLSI Technology, Systems, and Applications
ISSN1524-766X

Conference

Title2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
Duration23 - 25 April 2007
CityHsinchu
CountryTaiwan, Province of China

External IDs

ORCID /0000-0003-3814-0378/work/156338386