Single Transistor Analog Building Blocks: Exploiting Back-Bias Reconfigurable Devices

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • Niladri Bhattacharjee - , NaMLab - Nanoelectronic materials laboratory gGmbH (Author)
  • Maximilian Reuter - , Technische Universität Darmstadt (Author)
  • Klaus Hofmann - , Technische Universität Darmstadt (Author)
  • Thomas Mikolajick - , Chair of Nanoelectronics, NaMLab - Nanoelectronic materials laboratory gGmbH, TUD Dresden University of Technology (Author)
  • Jens Trommer - , Faculty of Electrical and Computer Engineering, NaMLab - Nanoelectronic materials laboratory gGmbH (Author)

Abstract

Reconfigurable Field Effect Transistors (RFETs) combine P-FET and N-FET properties on a single device, enabling the development of new circuit applications. In this paper, we present SPICE simulations of analog building blocks using a Verilog-A Table Model of a new RFET variant, called Back-Bias RFETs (BB-RFETs). The Verilog-A look-up model is extracted from TCAD simulations based on a previously fabricated and measured BB-RFET device on a 22 nm FDSOI platform. The model is verified to mimic the experimentally observed analog circuit behaviours such as frequency doubling and phase shifting from a single transistor setup. In addition, utilizing the reconfiguration between three operational modes, a newly conceived reconfigurable-rectifier is proposed which can be dynamically switched between half-wave rectifier and full-wave rectifier. Both the model and the newly designed circuit building blocks, therefore, aim to inspire circuit designers to utilize this emerging technology for future computing.

Details

Original languageEnglish
Title of host publication2023 21st IEEE Interregional NEWCAS Conference (NEWCAS)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages1-5
ISBN (electronic)979-8-3503-0024-6
ISBN (print)979-8-3503-0025-3
Publication statusPublished - 2023
Peer-reviewedYes

Publication series

SeriesAnnual IEEE Northeast Workshop on Circuits and Systems (NEWCAS)

Conference

Title21st IEEE Interregional NEWCAS Conference
Abbreviated titleNEWCAS 2023
Conference number21
Duration26 - 28 June 2023
Website
Degree of recognitionInternational event
LocationJohn McIntyre Conference Centre
CityEdinburgh
CountryUnited Kingdom

External IDs

ORCID /0000-0003-3814-0378/work/144255460
dblp conf/newcas/BhattacharjeeRHMT23

Keywords

Keywords

  • 22 nm FDSOI, Analog Circuits, Back-Bias, Cadence Virtuoso, Reconfigurable Field Effect Transistors, TCAD