Single Transistor Analog Building Blocks: Exploiting Back-Bias Reconfigurable Devices
Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten › Beitrag in Konferenzband › Beigetragen › Begutachtung
Beitragende
Abstract
Reconfigurable Field Effect Transistors (RFETs) combine P-FET and N-FET properties on a single device, enabling the development of new circuit applications. In this paper, we present SPICE simulations of analog building blocks using a Verilog-A Table Model of a new RFET variant, called Back-Bias RFETs (BB-RFETs). The Verilog-A look-up model is extracted from TCAD simulations based on a previously fabricated and measured BB-RFET device on a 22 nm FDSOI platform. The model is verified to mimic the experimentally observed analog circuit behaviours such as frequency doubling and phase shifting from a single transistor setup. In addition, utilizing the reconfiguration between three operational modes, a newly conceived reconfigurable-rectifier is proposed which can be dynamically switched between half-wave rectifier and full-wave rectifier. Both the model and the newly designed circuit building blocks, therefore, aim to inspire circuit designers to utilize this emerging technology for future computing.
Details
| Originalsprache | Englisch |
|---|---|
| Titel | 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS) |
| Herausgeber (Verlag) | Institute of Electrical and Electronics Engineers (IEEE) |
| Seiten | 1-5 |
| ISBN (elektronisch) | 979-8-3503-0024-6 |
| ISBN (Print) | 979-8-3503-0025-3 |
| Publikationsstatus | Veröffentlicht - 2023 |
| Peer-Review-Status | Ja |
Publikationsreihe
| Reihe | Annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS) |
|---|
Konferenz
| Titel | 21st IEEE Interregional NEWCAS Conference |
|---|---|
| Kurztitel | NEWCAS 2023 |
| Veranstaltungsnummer | 21 |
| Dauer | 26 - 28 Juni 2023 |
| Webseite | |
| Bekanntheitsgrad | Internationale Veranstaltung |
| Ort | John McIntyre Conference Centre |
| Stadt | Edinburgh |
| Land | Großbritannien/Vereinigtes Königreich |
Externe IDs
| ORCID | /0000-0003-3814-0378/work/144255460 |
|---|---|
| dblp | conf/newcas/BhattacharjeeRHMT23 |
Schlagworte
ASJC Scopus Sachgebiete
Schlagwörter
- 22 nm FDSOI, Analog Circuits, Back-Bias, Cadence Virtuoso, Reconfigurable Field Effect Transistors, TCAD