Short-term charge trapping effects in ferroelectric FETs: impact of pulse amplitude and timing
Research output: Contribution to journal › Research article › Contributed › peer-review
Contributors
Abstract
This study investigates the short-term (µs to s timespan) charge trapping effects in hafnium oxide-based ferroelectric field-effect transistors, integrated within GlobalFoundries’ 28 nm bulk high-k metal gate (HKMG) technology. Even without ferroelectric switching, positive gate voltage pulses can cause significant short-term electron trapping due to strong energy band bending that enables charge injection. A systematic analysis reveals that the extent of short-term trapping increases with both the amplitude and the duration of the applied gate pulses. These dependencies are consolidated into a positive bias charge trapping matrix, offering an overview of how various factors collectively influence trapping behavior. Negative gate bias does not cause charge trapping in FeFETs for the investigated voltage and time domain. Building on previous reports of degradation-free unipolar endurance cycling, these observations further support the conclusion that the pronounced short-term trapping effects are primarily non-destructive. The study highlights the importance of understanding and accounting for short-term charge trapping effects, especially as they relate to read-after-write capabilities and overlaps with switching mechanisms. This understanding is crucial for optimizing the consistent and effective operation of FeFETs as memory cells and neuromorphic computing elements.
Details
| Original language | English |
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| Article number | 109332 |
| Journal | Solid-state electronics |
| Volume | 233 |
| Publication status | Published - Apr 2026 |
| Peer-reviewed | Yes |
| Externally published | Yes |
External IDs
| ORCID | /0000-0003-3814-0378/work/205334820 |
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Keywords
ASJC Scopus subject areas
Keywords
- Charge trapping, Ferroelectric field-effect transistor, Ferroelectric memories, Hafnium oxide