Short-term charge trapping effects in ferroelectric FETs: impact of pulse amplitude and timing

Publikation: Beitrag in FachzeitschriftForschungsartikelBeigetragenBegutachtung

Beitragende

  • Dominik Kleimaier - , Global Foundries Dresden (Autor:in)
  • Stefan Dünkel - , Global Foundries Dresden (Autor:in)
  • Halid Mulaosmanovic - , Global Foundries Dresden (Autor:in)
  • Johannes Müller - , Global Foundries Dresden (Autor:in)
  • Sven Beyer - , Global Foundries Dresden (Autor:in)
  • Viktor Havel - , NaMLab - Nanoelectronic materials laboratory gGmbH (Autor:in)
  • Thomas Mikolajick - , NaMLab - Nanoelectronic materials laboratory gGmbH (Autor:in)

Abstract

This study investigates the short-term (µs to s timespan) charge trapping effects in hafnium oxide-based ferroelectric field-effect transistors, integrated within GlobalFoundries’ 28 nm bulk high-k metal gate (HKMG) technology. Even without ferroelectric switching, positive gate voltage pulses can cause significant short-term electron trapping due to strong energy band bending that enables charge injection. A systematic analysis reveals that the extent of short-term trapping increases with both the amplitude and the duration of the applied gate pulses. These dependencies are consolidated into a positive bias charge trapping matrix, offering an overview of how various factors collectively influence trapping behavior. Negative gate bias does not cause charge trapping in FeFETs for the investigated voltage and time domain. Building on previous reports of degradation-free unipolar endurance cycling, these observations further support the conclusion that the pronounced short-term trapping effects are primarily non-destructive. The study highlights the importance of understanding and accounting for short-term charge trapping effects, especially as they relate to read-after-write capabilities and overlaps with switching mechanisms. This understanding is crucial for optimizing the consistent and effective operation of FeFETs as memory cells and neuromorphic computing elements.

Details

OriginalspracheEnglisch
Aufsatznummer109332
FachzeitschriftSolid-state electronics
Jahrgang233
PublikationsstatusVeröffentlicht - Apr. 2026
Peer-Review-StatusJa
Extern publiziertJa

Externe IDs

ORCID /0000-0003-3814-0378/work/205334820

Schlagworte

Schlagwörter

  • Charge trapping, Ferroelectric field-effect transistor, Ferroelectric memories, Hafnium oxide