Conduction barrier offset engineering for DRAM capacitor scaling
Research output: Contribution to journal › Research article › Contributed › peer-review
Contributors
Details
| Original language | English |
|---|---|
| Pages (from-to) | 133-139 |
| Number of pages | 7 |
| Journal | Solid-state electronics |
| Volume | 115 |
| Issue number | Part B |
| Publication status | Published - 2016 |
| Peer-reviewed | Yes |
External IDs
| Scopus | 84948085567 |
|---|