Charge cross talk in sub-lithographically shrinked 32 nm Twin Flash™ memory cells

Research output: Contribution to journalResearch articleContributedpeer-review

Contributors

  • M. F. Beug - , Qimonda Dresden GmbH and Co. OHG (Author)
  • R. Knöfler - , Qimonda Dresden GmbH and Co. OHG (Author)
  • C. Ludwig - , Qimonda Dresden GmbH and Co. OHG (Author)
  • R. Hagenbeck - , Qimonda Dresden GmbH and Co. OHG (Author)
  • T. Müller - , Qimonda Dresden GmbH and Co. OHG (Author)
  • S. Riedel - , Qimonda Dresden GmbH and Co. OHG (Author)
  • T. Höhr - , Qimonda Dresden GmbH and Co. OHG (Author)
  • J. U. Sachse - , Qimonda Dresden GmbH and Co. OHG (Author)
  • N. Nagel - , Qimonda Dresden GmbH and Co. OHG (Author)
  • T. Mikolajick - , Freiberg University of Mining and Technology (Author)
  • K. H. Küsters - , Qimonda Dresden GmbH and Co. OHG (Author)

Abstract

The extended scalability of Twin Flash memory cells down to 32 nm half pitch is demonstrated in a conventional planar cell layout. Starting with 63 nm line space array and doubling the number of word lines, a cell size of 0.0112 μm2 can be achieved. By dividing available space into 43 nm cell width and 20 nm space between adjacent cells the electrical cell characteristics could be maintained the same as in the previous 63 nm generation. It was found that the proposed aggressive shrinking of the cell spacing in word line direction results in a cross talk of 300 mV when both neighboring cells are programmed to the highest MLC level. The charge cross talk in charge trapping memory (CT) cells is reported for the first time and becomes an issue when cell spacing between Twin Flash and other CT cells as e.g. TANOS approaches the 20 nm mark.

Details

Original languageEnglish
Pages (from-to)571-576
Number of pages6
JournalSolid-state electronics
Volume52
Issue number4
Publication statusPublished - Apr 2008
Peer-reviewedYes
Externally publishedYes

External IDs

ORCID /0000-0003-3814-0378/work/156338394