Back-bias reconfigurable field effect transistor: A flexible add-on functionality for 22 nm FDSOI
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
Here we present a highly scalable reconfigurable field effect transistor concept, which is capable of dynamically switching between p-type, n-type, and ambipolar operation modes by adaptively changing the applied back-bias. The devices are processed on full-scale 300 mm wafers and reach gate lengths down to 20 nm, integrable into a 22 nm FDSOI platform with only minor process modifications. We demonstrate symmetric IV characteristics of p- and n-program with Im/loFF ratio up to 103 at a VDD of 0.8 V, and propose an exploitation in hardware security. In arnbipolar mode, frequency multiplication requiring only a single transistor is experimentally demonstrated.
Details
Original language | English |
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Title of host publication | 2021 Silicon Nanoelectronics Workshop, SNW 2021 |
Publisher | IEEE, New York [u. a.] |
ISBN (electronic) | 9784863487819 |
Publication status | Published - 2021 |
Peer-reviewed | Yes |
Publication series
Series | 2021 Silicon Nanoelectronics Workshop (SNW) |
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Conference
Title | 26th Silicon Nanoelectronics Workshop, SNW 2021 |
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Duration | 13 June 2021 |
City | Virtual, Online |
Country | Japan |
External IDs
ORCID | /0000-0003-3814-0378/work/142256168 |
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Keywords
ASJC Scopus subject areas
Keywords
- Analog, FDSOl, Reconfigurable, Security, VLSl