Automated Hardening of Deep Neural Network Architectures

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Contributors

Abstract

Designing optimal neural network (NN) architectures is a difficult and time-consuming task, especially when error resiliency and hardware efficiency are considered simultaneously. In our paper, we extend neural architecture search (NAS) to also optimize a NN’s error resilience and hardware related metrics in addition to classification accuarcy. To this end, we consider the error sensitivity of a NN on the architecture-level during NAS and additionally incorporate checksums into the network as an external error detection mechanism. With an additional computational overhead as low as 17 % for the discovered architectures, checksums are an efficient method to effectively enhance the error resilience of NNs. Furthermore, the results show that cell-based NN architectures are able to maintain their error resilience characteristics when transferred to other tasks.

Details

Original languageEnglish
Title of host publicationSafety Engineering, Risk, and Reliability Analysis; Research Posters
PublisherThe American Society of Mechanical Engineers(ASME)
Volume13
ISBN (electronic)978-0-7918-8569-7
Publication statusPublished - 2021
Peer-reviewedYes

Publication series

SeriesASME International Mechanical Engineering Congress and Exposition, Proceedings (IMECE)

Conference

TitleASME 2021 International Mechanical Engineering Congress and Exposition, IMECE 2021
Duration1 - 5 November 2021
CityVirtual, Online

Keywords

ASJC Scopus subject areas

Keywords

  • Error Resilience, Neural Architecture Search, Neural Network Hardware, Random Hardware Faults