The ferroelectric HfO2 based field effect transistor (FeFET) has been under research for many years and shows unique properties for applications in the field of emerging memories and in-memory computing. This work for the first time demonstrates how a target programming algorithm can improve the FeFET device characteristics with respect to endurance performance and variability for small device geometries. With this technique the threshold voltage Vt of the memory cell can be targeted to any desired value, which is essential for multilevel cells and analog in-memory computing as used in AI accelerators. The switching, trapping and detrapping characteristics of the cell and their influence on the target programming algorithm are presented. The trapping and leakage characteristics are modelled using the GinestraTM simulation software to extract the trap distribution in ferroelectric HfO2. Finally, a model for the underlying mechanism of the endurance degradation is proposed.