Vertically Integrated Reconfigurable Nanowire Arrays
Research output: Contribution to journal › Research article › Contributed › peer-review
Contributors
Abstract
This letter discusses a feasible variant of vertically integrated reconfigurable field effect transistors (RFET) based on top-down nanowires. The structures were studied by 3-D device simulations. Subdividing the structure into two vertical pillars allows a lean technological realization as well as simple access to the electrodes. In addition of enabling p- and n-FET operations like a horizontal RFET, the device delivers higher performance. We show that by the integration of additional vertical pillars and select gates, a higher device functionality and flexibility in interconnection are provided.
Details
Original language | English |
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Pages (from-to) | 1242 - 1245 |
Journal | IEEE electron device letters |
Volume | 39 |
Issue number | 8 |
Publication status | Published - Aug 2018 |
Peer-reviewed | Yes |
External IDs
Scopus | 85048636013 |
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