User Customizable Logic Paper (UCLP) with organic sea-of-transmission-gates (SOTG) architecture and ink-jet printed interconnects

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • Koichi Ishida - , Chair of Circuit Design and Network Theory, The University of Tokyo, Bunkyo University (Author)
  • Naoki Masunaga - , The University of Tokyo (Author)
  • Ryo Takahashi - , Tokyo University of Agriculture (Author)
  • Tsuyoshi Sekitani - , Tokyo University of Agriculture (Author)
  • Shigeki Shino - , Mitsubishi Paper Mills Limited (Author)
  • Ute Zschieschang - , Max Planck Institute for Solid State Research (Author)
  • Hagen Klauk - , Max Planck Institute for Solid State Research (Author)
  • Makoto Takamiya - , The University of Tokyo (Author)
  • Takao Someya - , The University of Tokyo (Author)
  • Takayasu Sakurai - , Tokyo University of Agriculture (Author)

Abstract

With recent advances in printable large-area electronics [1, 2], it is not a fantasy anymore to print macroscopic-level organic ICs by ink-jet printers. To prototype the organic circuits for the higher integration level, we propose User Customizable Logic Paper (UCLP). The UCLP can be easily customized by the user and operated in a speed for educational purposes that one can see how the circuit operates with one's naked eyes. With an ordinary ink-jet printer, one can utilize UCLP to make one's own circuit by printing customized interconnects on the prefabricated array of organic transistors. This paper demonstrates the feasibility and in-field customizability of UCLP with Sea-of Transmission-Gates (SOTG) of organic CMOS transistors. This type of technology will provide ways to add programmability for ICs used in large-area electronics such as smart flexible displays, power transmission sheets, and electronic skin for robots.

Details

Original languageEnglish
Title of host publication2010 IEEE International Solid-State Circuits Conference - (ISSCC)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages138-139
Number of pages2
ISBN (print)978-1-4244-6035-9
Publication statusPublished - 11 Feb 2010
Peer-reviewedYes

Conference

Title2010 IEEE International Solid-State Circuits Conference - (ISSCC)
Duration7 - 11 February 2010
LocationSan Francisco, CA, USA

External IDs

Scopus 77952162686
ORCID /0000-0002-4152-1203/work/165453400

Keywords

Keywords

  • Ink jet printing, Integrated circuit interconnections, Multiplexing, Variable structure systems, Semiconductor device measurement, Logic functions, Light emitting diodes, Logic gates, Propagation delay, Electrical resistance measurement