User Customizable Logic Paper (UCLP) with organic sea-of-transmission-gates (SOTG) architecture and ink-jet printed interconnects

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

  • Koichi Ishida - , Professur für Schaltungstechnik und Netzwerktheorie, Tokyo Daigaku, Bunkyo University (Autor:in)
  • Naoki Masunaga - , Tokyo Daigaku (Autor:in)
  • Ryo Takahashi - , Tokyo University of Agriculture (Autor:in)
  • Tsuyoshi Sekitani - , Tokyo University of Agriculture (Autor:in)
  • Shigeki Shino - , Mitsubishi Paper Mills (Autor:in)
  • Ute Zschieschang - , Max-Planck-Institut für Festkörperforschung (Autor:in)
  • Hagen Klauk - , Max-Planck-Institut für Festkörperforschung (Autor:in)
  • Makoto Takamiya - , Tokyo Daigaku (Autor:in)
  • Takao Someya - , Tokyo Daigaku (Autor:in)
  • Takayasu Sakurai - , Tokyo University of Agriculture (Autor:in)

Abstract

With recent advances in printable large-area electronics [1, 2], it is not a fantasy anymore to print macroscopic-level organic ICs by ink-jet printers. To prototype the organic circuits for the higher integration level, we propose User Customizable Logic Paper (UCLP). The UCLP can be easily customized by the user and operated in a speed for educational purposes that one can see how the circuit operates with one's naked eyes. With an ordinary ink-jet printer, one can utilize UCLP to make one's own circuit by printing customized interconnects on the prefabricated array of organic transistors. This paper demonstrates the feasibility and in-field customizability of UCLP with Sea-of Transmission-Gates (SOTG) of organic CMOS transistors. This type of technology will provide ways to add programmability for ICs used in large-area electronics such as smart flexible displays, power transmission sheets, and electronic skin for robots.

Details

OriginalspracheEnglisch
Titel2010 IEEE International Solid-State Circuits Conference - (ISSCC)
Herausgeber (Verlag)IEEE
Seiten138-139
Seitenumfang2
ISBN (Print)978-1-4244-6035-9
PublikationsstatusVeröffentlicht - 11 Feb. 2010
Peer-Review-StatusJa

Konferenz

Titel2010 IEEE International Solid-State Circuits Conference - (ISSCC)
Dauer7 - 11 Februar 2010
OrtSan Francisco, CA, USA

Externe IDs

Scopus 77952162686
ORCID /0000-0002-4152-1203/work/165453400

Schlagworte

Schlagwörter

  • Ink jet printing, Integrated circuit interconnections, Multiplexing, Variable structure systems, Semiconductor device measurement, Logic functions, Light emitting diodes, Logic gates, Propagation delay, Electrical resistance measurement