The Velox Transactional Memory Stack

Research output: Contribution to journalResearch articleContributedpeer-review

Contributors

  • Yehuda Afek - , Tel Aviv University (Author)
  • Ulrich Drepper - , Red Hat (Author)
  • Pascal Felber - , University of Neuchatel (Author)
  • Christof Fetzer - , Chair of Systems Engineering (Author)
  • Vincent Gramoli - , University of Neuchatel (Author)
  • Michael Hohmuth - , AMD Saxony (Author)
  • Etienne Rivière - , University of Neuchatel (Author)
  • Per Stenstrom - , Chalmers University of Technology (Author)
  • Osman Unsal - , Barcelona Supercomputing Center (Author)
  • Walther Maldonado Moreira - , University of Neuchatel (Author)
  • Derin Harmanci - , University of Neuchatel (Author)
  • Patrick Marlier - , University of Neuchatel (Author)
  • Stephan Diestelhorst - , AMD Saxony (Author)
  • Martin Pohlack - , AMD Saxony (Author)
  • Adrian Cristal - , Barcelona Supercomputing Center (Author)
  • Ibrahim Hur - , Barcelona Supercomputing Center (Author)
  • Aleksandar Dragojevic - , Swiss Federal Institute of Technology Lausanne (EPFL) (Author)
  • Rachid Guerraoui - , Swiss Federal Institute of Technology Lausanne (EPFL) (Author)
  • Michal Kapalka - , Swiss Federal Institute of Technology Lausanne (EPFL) (Author)
  • Saša Tomić - , UPC Polytechnic University of Catalonia (Barcelona Tech) (Author)
  • Guy Korland - , Tel Aviv University (Author)
  • Nir Shavit - , Tel Aviv University (Author)
  • Martin Nowack - , Chair of Systems Engineering (Author)
  • Torvald Riegel - , TUD Dresden University of Technology (Author)

Abstract

The adoption of multi- and many-core architectures for mainstream computing undoubtedly brings profound changes in the way software is developed. In particular, the use of fine grained locking as the multi-core programmer's coordination methodology is considered by more and more experts as a dead-end. The transactional memory (TM) programming paradigm is a strong contender to become the approach of choice for replacing locks and implementing atomic operations in concurrent programming. Combining sequences of concurrent operations into atomic transactions allows a great reduction in the complexity of both programming and verification, by making parts of the code appear to execute sequentially without the need to program using fine-grained locking. Transactions remove from the programmer the burden of figuring out the interaction among concurrent operations that happen to conflict when accessing the same locations in memory. The EU-funded FP7 VELOX project designs, implements and evaluates an integrated TM stack, spanning from programming language to the hardware support, and including runtime and libraries, compilers, and application environments. This paper presents an overview of the VELOX TM stack and its associated challenges and contributions.

Details

Original languageEnglish
Pages (from-to)76-87
Number of pages12
JournalIEEE Micro
Volume30
Issue number5
Publication statusPublished - Sept 2010
Peer-reviewedYes

External IDs

Scopus 78649504920

Keywords

Research priority areas of TU Dresden

DFG Classification of Subject Areas according to Review Boards

Keywords

  • concurrent programming, software transactional memory, hardware transactional memory, compilers, language extensions, libraties, runtine, hardware, Java, Programming, Program processors