The Velox Transactional Memory Stack

Publikation: Beitrag in FachzeitschriftForschungsartikelBeigetragenBegutachtung

Beitragende

  • Yehuda Afek - , Tel Aviv University (Autor:in)
  • Ulrich Drepper - , Red Hat (Autor:in)
  • Pascal Felber - , Universität Neuenburg (Autor:in)
  • Christof Fetzer - , Professur für Systems Engineering (SE) (Autor:in)
  • Vincent Gramoli - , Universität Neuenburg (Autor:in)
  • Michael Hohmuth - , AMD Saxony (Autor:in)
  • Etienne Rivière - , Universität Neuenburg (Autor:in)
  • Per Stenstrom - , Chalmers University of Technology (Autor:in)
  • Osman Unsal - , Barcelona Supercomputing Center (Autor:in)
  • Walther Maldonado Moreira - , Universität Neuenburg (Autor:in)
  • Derin Harmanci - , Universität Neuenburg (Autor:in)
  • Patrick Marlier - , Universität Neuenburg (Autor:in)
  • Stephan Diestelhorst - , AMD Saxony (Autor:in)
  • Martin Pohlack - , AMD Saxony (Autor:in)
  • Adrian Cristal - , Barcelona Supercomputing Center (Autor:in)
  • Ibrahim Hur - , Barcelona Supercomputing Center (Autor:in)
  • Aleksandar Dragojevic - , École Polytechnique Fédérale de Lausanne (Autor:in)
  • Rachid Guerraoui - , École Polytechnique Fédérale de Lausanne (Autor:in)
  • Michal Kapalka - , École Polytechnique Fédérale de Lausanne (Autor:in)
  • Saša Tomić - , UPC Universitat Politècnica de Catalunya (Barcelona Tech) (Autor:in)
  • Guy Korland - , Tel Aviv University (Autor:in)
  • Nir Shavit - , Tel Aviv University (Autor:in)
  • Martin Nowack - , Professur für Systems Engineering (SE) (Autor:in)
  • Torvald Riegel - , Technische Universität Dresden (Autor:in)

Abstract

The adoption of multi- and many-core architectures for mainstream computing undoubtedly brings profound changes in the way software is developed. In particular, the use of fine grained locking as the multi-core programmer's coordination methodology is considered by more and more experts as a dead-end. The transactional memory (TM) programming paradigm is a strong contender to become the approach of choice for replacing locks and implementing atomic operations in concurrent programming. Combining sequences of concurrent operations into atomic transactions allows a great reduction in the complexity of both programming and verification, by making parts of the code appear to execute sequentially without the need to program using fine-grained locking. Transactions remove from the programmer the burden of figuring out the interaction among concurrent operations that happen to conflict when accessing the same locations in memory. The EU-funded FP7 VELOX project designs, implements and evaluates an integrated TM stack, spanning from programming language to the hardware support, and including runtime and libraries, compilers, and application environments. This paper presents an overview of the VELOX TM stack and its associated challenges and contributions.

Details

OriginalspracheEnglisch
Seiten (von - bis)76-87
Seitenumfang12
FachzeitschriftIEEE Micro
Jahrgang30
Ausgabenummer5
PublikationsstatusVeröffentlicht - Sept. 2010
Peer-Review-StatusJa

Externe IDs

Scopus 78649504920

Schlagworte

Forschungsprofillinien der TU Dresden

DFG-Fachsystematik nach Fachkollegium

Schlagwörter

  • concurrent programming, software transactional memory, hardware transactional memory, compilers, language extensions, libraties, runtine, hardware, Java, Programming, Program processors