The Operating System of the Neuromorphic BrainScaleS-1 System

Research output: Contribution to journalResearch articleContributedpeer-review


  • Eric Müller - , Heidelberg University  (Author)
  • Sebastian Schmitt - , University of Göttingen (Author)
  • Christian Mauch - , Heidelberg University  (Author)
  • Sebastian Billaudelle - , Heidelberg University  (Author)
  • Andreas Grübl - , Heidelberg University  (Author)
  • Maurice Güttler - , Heidelberg University  (Author)
  • Dan Husmann - , Heidelberg University  (Author)
  • Joscha Ilmberger - , Heidelberg University  (Author)
  • Sebastian Jeltsch - , Heidelberg University  (Author)
  • Jakob Kaiser - , Heidelberg University  (Author)
  • Johann Klähn - , Heidelberg University  (Author)
  • Mitja Kleider - , Heidelberg University  (Author)
  • Christoph Koke - , Heidelberg University  (Author)
  • José Montes - , Heidelberg University  (Author)
  • Paul Müller - , Heidelberg University  (Author)
  • Johannes Partzsch - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
  • Felix Passenberg - , Heidelberg University  (Author)
  • Hartmut Schmidt - , Heidelberg University  (Author)
  • Bernhard Vogginger - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
  • Jonas Weidner - , Heidelberg University  (Author)
  • Christian Mayr - , Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (Author)
  • Johannes Schemmel - , Heidelberg University  (Author)


BrainScaleS-1 is a wafer-scale mixed-signal accelerated neuromorphic system targeted for research in the fields of computational neuroscience and beyond-von-Neumann computing. Here we present the BrainScaleS Operating System (BrainScaleS OS): the software stack gives users the possibility to emulate networks described in the high-level network description language PyNN with minimal knowledge of the system, as well as expert usage facilitated by allowing access to the system at any depth of the stack. BrainScaleS OS has been used extensively in the commissioning and calibration of BrainScaleS-1 as well as in various neuromorphic experiments, e.g., rate-based deep learning, accelerated physical emulation of Bayesian inference, solving of SAT problems, and others. The tolerance to faults of individual components of the neuromorphic system is reflected in the mapping process based on information stored in an availability database. We evaluate the robustness and compensation mechanisms of the system and software stack. The software stack is designed with performance in mind, with its core implemented in C++ and most user-facing API wrapped automatically to Python. The implemented multi-FPGA orchestration allows for parallel configuration and synchronized experiments facilitating wafer-scale experiments. The initial configuration of a wafer-scale experiment with hundreds of neuromorphic ASICs is performed in a fraction of a minute. Subsequent experiments, that potentially change only a subset of parameters, can be executed with rates of typically 10Hz. The bandwidth from the host machine to the neuromorphic system is fully utilized starting from a quarter of the system’s FPGA count. Operation and development methodologies implemented for the BrainScaleS-1 neuromorphic architecture are presented and the individual components of BrainScaleS OS constituting the software stack for BrainScaleS-1 platform operation are detailed.


Original languageEnglish
Pages (from-to)790-810
Number of pages21
Publication statusPublished - 2022

External IDs

Scopus 85133220321
ORCID /0000-0002-6286-5064/work/142240641



  • Neuromorphic computing, neuroscientific modeling, hardware abstraction