Surface Preconditioning and Postmetallization Anneal Improving Interface Properties and Vth Stability under Positive Gate Bias Stress in AlGaN/GaN MIS-HEMTs

Research output: Contribution to journalResearch articleContributedpeer-review

Contributors

  • Anthony Calzolaro - , Chair of Nanoelectronics, NaMLab - Nanoelectronic materials laboratory gGmbH (Author)
  • Nadine Szabó - , TUD Dresden University of Technology (Author)
  • Andreas Großer - , TUD Dresden University of Technology (Author)
  • Jan Gärtner - , TUD Dresden University of Technology (Author)
  • Thomas Mikolajick - , Chair of Nanoelectronics, NaMLab - Nanoelectronic materials laboratory gGmbH (Author)
  • Andre Wachowiak - , TUD Dresden University of Technology (Author)

Abstract

Trap states at the dielectric/GaN interface of AlGaN/GaN-based metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) can cause threshold voltage (Vth) instability especially under positive gate bias stress. Herein, the influence of O2 plasma surface preconditioning (SPC) before the atomic layer deposition of the Al2O3 gate dielectric and of N2 postmetallization anneal (PMA) after gate metallization on the Al2O3/GaN interface quality is investigated. The interface is characterized by multifrequency capacitance–voltage measurements which show a smaller frequency dispersion after the employment of SPC and PMA treatments with a reduction of the interface trap density Dit to a value in the order of 2 × 1012 cm−2 eV−1 near the conduction band edge. The effectiveness of SPC and PMA is demonstrated in Al2O3/AlGaN/GaN MIS-HEMTs by pulsed current–voltage measurements which reveal improved Vth stability.

Details

Original languageEnglish
Article number2000585
JournalPhysica Status Solidi (A) Applications and Materials Science
Volume218
Issue number2
Publication statusPublished - Jan 2021
Peer-reviewedYes

External IDs

ORCID /0000-0003-3814-0378/work/142256180

Keywords

Keywords

  • AlGaN/GaN, dielectric/III-nitride interfaces, interface traps, metal–insulator–semiconductor high electron mobility transistors, V instability