Simulation and Modelling for Network-on-Chip based MPSoC

Research output: Contribution to book/conference proceedings/anthology/reportConference contributionContributedpeer-review

Abstract

As systems that can adapt their architecture and behavior in response to their environment become increasingly valuable in modern applications, research and development in inherently adaptive embedded systems is gaining momentum. Network-on-Chip based multi-processor architectures are promising for the development of adaptive embedded systems. The aim of this PhD work is to create a comprehensive simulation platform that bridges the gap between simulation and the design of such adaptive systems on real hardware. This paper introduces our proposed platform, presents preliminary results, and highlights upcoming steps and planned future work in this research topic.

Details

Original languageEnglish
Title of host publicationApplied Reconfigurable Computing. Architectures, Tools, and Applications - 19th International Symposium, ARC 2023, Proceedings
EditorsFrancesca Palumbo, Georgios Keramidas, Nikolaos Voros, Pedro C. Diniz
PublisherSpringer, Cham
Pages366-370
Number of pages5
ISBN (electronic)978-3-031-42921-7
ISBN (print)978-3-031-42920-0
Publication statusPublished - 16 Sept 2023
Peer-reviewedYes

Conference

Title19th International Symposium on Applied Reconfigurable Computing
Abbreviated titleARC 2023
Conference number19
Duration27 - 29 September 2023
Website
Degree of recognitionInternational event
LocationBrandenburg University of Technology
CityCottbus
CountryGermany

External IDs

ORCID /0000-0003-2571-8441/work/145223642
ORCID /0000-0002-8604-0139/work/145224095
Scopus 85174435271

Keywords

Keywords

  • Modelling, Network-on-Chip, Simulator, SystemC TLM, heterogeneous MPSoC