Simulation and Modelling for Network-on-Chip based MPSoC

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Abstract

As systems that can adapt their architecture and behavior in response to their environment become increasingly valuable in modern applications, research and development in inherently adaptive embedded systems is gaining momentum. Network-on-Chip based multi-processor architectures are promising for the development of adaptive embedded systems. The aim of this PhD work is to create a comprehensive simulation platform that bridges the gap between simulation and the design of such adaptive systems on real hardware. This paper introduces our proposed platform, presents preliminary results, and highlights upcoming steps and planned future work in this research topic.

Details

OriginalspracheEnglisch
TitelApplied Reconfigurable Computing. Architectures, Tools, and Applications - 19th International Symposium, ARC 2023, Proceedings
Redakteure/-innenFrancesca Palumbo, Georgios Keramidas, Nikolaos Voros, Pedro C. Diniz
Herausgeber (Verlag)Springer, Cham
Seiten366-370
Seitenumfang5
ISBN (elektronisch)978-3-031-42921-7
ISBN (Print)978-3-031-42920-0
PublikationsstatusVeröffentlicht - 16 Sept. 2023
Peer-Review-StatusJa

Konferenz

Titel19th International Symposium on Applied Reconfigurable Computing
KurztitelARC 2023
Veranstaltungsnummer19
Dauer27 - 29 September 2023
Webseite
BekanntheitsgradInternationale Veranstaltung
OrtBrandenburgische Technische Universität Cottbus-Senftenberg
StadtCottbus
LandDeutschland

Externe IDs

ORCID /0000-0003-2571-8441/work/145223642
ORCID /0000-0002-8604-0139/work/145224095
Scopus 85174435271

Schlagworte

Schlagwörter

  • Modelling, Network-on-Chip, Simulator, SystemC TLM, heterogeneous MPSoC