SHRIMP: Efficient Instruction Delivery with Domain Wall Memory

Research output: Contribution to book/conference proceedings/anthology/reportConference contributionContributedpeer-review

Contributors

Abstract

Domain Wall Memory (DWM) is a promising emerging memory technology but suffers from the expensive shifts needed to align memory locations with access ports. Previous work on DWM concentrates on data, while, to the best of our knowledge, techniques to specifically target instruction streams have not yet been studied. In this paper, we propose Shift-Reducing Instruction Memory Placement (SHRIMP), the first instruction placement strategy suited for DWM which is accompanied with a supporting instruction fetch and memory architecture. The proposed approach reduces the number of shifts by 40% in the best case with a small memory overhead. In addition, SHRIMP achieves a best case of 23% reduction in total cycle counts.

Details

Original languageEnglish
Title of host publication2019 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)
PublisherIEEE Xplore
ISBN (electronic)978-1-7281-2954-9
ISBN (print)978-1-7281-2955-6
Publication statusPublished - Jul 2019
Peer-reviewedYes

Publication series

SeriesInternational Symposium on Low Power Electronics and Design (ISLPED)
ISSN1533-4678

Conference

Title2019 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2019
Duration29 - 31 July 2019
CityLausanne
CountrySwitzerland

External IDs

ORCID /0000-0002-5007-445X/work/141545612

Keywords

Research priority areas of TU Dresden

ASJC Scopus subject areas