PRFloor: An automatic floorplanner for partially reconfigurable FPGA systems
Research output: Contribution to book/conference proceedings/anthology/report › Conference contribution › Contributed › peer-review
Contributors
Abstract
Partial reconfiguration (PR) is gaining more attention from the research community because of its flexibility in dynamically changing some parts of the system at runtime. However, the current PR tools need the designer's involvement in manually specifying the shapes and locations for the PR regions (PRRs). It requires not only deep knowledge of the FPGA device, the system architecture, but also many trial-and-error attempts to find the best-possible floorplan. Therefore, many research works have been conducted to propose automatic floorplanners for PR systems. However, one of the most significant limitations of those works is that they only consider the PRRs and ignore all other static modules. In this paper, we propose a novel PR floorplanner called PRFloor. It takes into account all components in the system. The main ideas behind PRFloor are the unique recursive pseudo-bipartitioning heuristic using a new, simple, yet effective Nonlinear Integer Programming-based bipartitioner. The PRFloor performs very well in the experiments with various synthetic PR system setups with up to 130 modules, 24 PRRs and 85% of the FPGA resource. The average maximum clock frequency obtained for the actual PR systems implemented using PRFloor is even 3% higher than the similar systems without PR capability.
Details
Original language | English |
---|---|
Title of host publication | FPGA 2016 - Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays |
Publisher | Association for Computing Machinery, Inc |
Pages | 149-158 |
Number of pages | 10 |
ISBN (electronic) | 9781450338561 |
Publication status | Published - 21 Feb 2016 |
Peer-reviewed | Yes |
Conference
Title | 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2016 |
---|---|
Duration | 21 - 23 February 2016 |
City | Monterey |
Country | United States of America |
Keywords
Research priority areas of TU Dresden
ASJC Scopus subject areas
Keywords
- Bipartition, FPGA floorplan, NLP, Partial reconfiguration