Pattern representation and recognition with accelerated analog neuromorphic systems
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
Despite being originally inspired by the central nervous system, artificial neural networks have diverged from their biological archetypes as they have been remodeled to fit, particular tasks. In this paper, we review several possibilites to reverse map these architectures to biologically more realistic spiking networks with the aim of emulating them on fast, low-power neuromorphic hardware. Since many of these devices employ analog components, which cannot, be perfectly controlled, finding ways to compensate for the resulting effects represents a key challenge. Here, we discuss three different, strategies to address this problem: the addition of auxiliary network components for stabilizing activity, the utilization of inherently robust, architectures and a training method for hardware-emulated networks that, functions without, perfect, knowledge of the system's dynamics and parameters. For all three scenarios, we corroborate our theoretical considerations with experimental results on accelerated analog neuromorphic platforms.
Details
Original language | English |
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Title of host publication | IEEE International Symposium on Circuits and Systems |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (electronic) | 9781467368520 |
Publication status | Published - 25 Sept 2017 |
Peer-reviewed | Yes |
Publication series
Series | Proceedings - IEEE International Symposium on Circuits and Systems |
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ISSN | 0271-4310 |
Conference
Title | IEEE International Symposium on Circuits and Systems 2017 |
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Abbreviated title | ISCAS 2017 |
Conference number | 50 |
Duration | 28 - 31 May 2017 |
City | Baltimore |
Country | United States of America |
External IDs
ORCID | /0000-0002-6286-5064/work/160048710 |
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