Offset-Compensation Systems for Multi-Gbit/s Optical Receivers
Research output: Contribution to book/Conference proceedings/Anthology/Report › Chapter in book/Anthology/Report › Contributed › peer-review
Contributors
Abstract
Offset compensation (OC) systems are indispensable parts of multi-Gbit/s optical receiver (RX) frontends. Effects of offset are addressed in this chapter. The analytical expression for the highest lower-cut-off frequency of the OC with minimum impact on the sensitivity is found. Existing OC solutions are discussed. Then, a novel mixed-signal (MS) architecture is introduced which uses digital filtering of the signal, and current-digital-to-analog converters to compensate the static offset in the limiting amplifier. In the transimpedance amplifier both static and dynamic offset are compensated. By using two feedback loops and a continuous tracking the presented solution offers more functionality than other existing MS architectures. Three RX implementations, with RC, switched-capacitor (S-C) and with the MS-OC architectures, in the same 28 nm bulk-CMOS are compared quantitatively with measurements. The presented MS design reaches a lower-cut-off frequency of under 9 kHz, a dynamic range of over 1 mA, 3.2 μA residual input offset-current and it is compensating the RX via two feedback loops. The presented system offers a higher flexibility and functionality in implementation, as well as a very good compromise between area, precision and performance over the commonly used RC-filter and S-C filter based solutions.
Details
Original language | English |
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Title of host publication | VLSI-SoC |
Editors | Carolina Metzler, Ricardo Reis, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Carlos Silva-Cardenas |
Publisher | Springer |
Pages | 235-255 |
Number of pages | 21 |
ISBN (print) | 9783030532727 |
Publication status | Published - 2020 |
Peer-reviewed | Yes |
Publication series
Series | IFIP Advances in Information and Communication Technology |
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Volume | 586 IFIP |
ISSN | 1868-4238 |
Conference
Title | 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration |
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Abbreviated title | VLSI-SoC 2019 |
Conference number | 27 |
Duration | 6 - 9 October 2019 |
City | Cuzco |
Country | Peru |
External IDs
ORCID | /0000-0002-1851-6828/work/142256630 |
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Keywords
Research priority areas of TU Dresden
ASJC Scopus subject areas
Keywords
- Limiting amplifier (LA), Lower-cut-off frequency, Mixed-signal control loop, Offset, Offset compensation, Optical receiver, Residual offset, Transimpedance amplifier (TIA)