Hardware Failure Virtualization Via Software Encoded Processing
Research output: Contribution to conferences › Paper › Contributed › peer-review
Contributors
Abstract
In future, the decreasing feature size will make it
much more difficult to built reliable microprocessors. Economic
pressure will most likely result in the reliability of micro-
processors being tuned for the commodity market. Dedicated
reliable hardware is very expensive and usually slower than
commodity hardware. Thus, software implemented hardware
fault tolerance (SIHFT) will become essential for building safe
systems. Existing SIHFT approaches either are not broadly
applicable or lack the ability to reliably deal with permanent
hardware faults. In contrast, Forin [1] introduced the Vital Coded
Microprocessor which reliably detects transient and permanent
hardware failures, but is not applicable to arbitrary programs. It
requires a dedicated development process and special hardware.
We extend Forin’s Vital Code, so that it is applicable to arbitrary
binary code which enables us to apply it to existing binaries or
automatically during compile time. Furthermore, our approach
does not require special purpose hardware.
much more difficult to built reliable microprocessors. Economic
pressure will most likely result in the reliability of micro-
processors being tuned for the commodity market. Dedicated
reliable hardware is very expensive and usually slower than
commodity hardware. Thus, software implemented hardware
fault tolerance (SIHFT) will become essential for building safe
systems. Existing SIHFT approaches either are not broadly
applicable or lack the ability to reliably deal with permanent
hardware faults. In contrast, Forin [1] introduced the Vital Coded
Microprocessor which reliably detects transient and permanent
hardware failures, but is not applicable to arbitrary programs. It
requires a dedicated development process and special hardware.
We extend Forin’s Vital Code, so that it is applicable to arbitrary
binary code which enables us to apply it to existing binaries or
automatically during compile time. Furthermore, our approach
does not require special purpose hardware.
Details
Original language | English |
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Pages | 977-982 |
Number of pages | 6 |
Publication status | Published - 2007 |
Peer-reviewed | Yes |
Conference
Title | 2007 5th IEEE International Conference on Industrial Informatics |
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Abbreviated title | INDIN 2007 |
Conference number | 5 |
Duration | 23 - 27 June 2007 |
Website | |
Degree of recognition | International event |
City | Wien |
Country | Austria |
External IDs
Scopus | 39749134824 |
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Keywords
Research priority areas of TU Dresden
DFG Classification of Subject Areas according to Review Boards
Keywords
- hardware, Microprocessores, computer crashes, Resistance heating, Binary codes, Frequency, Lithography, Aerospace electronics, Software safety, Fault tolerant systems, electronic engineering computing, fault tolerant computing, hardware failure virtualization, software encoded processing, software implemented hardware fault tolerance