Germanium Nanowire Reconfigurable Transistor Model for Predictive Technology Evaluation

Research output: Contribution to journalResearch articleContributedpeer-review



Reconfigurable Field Effect Transistors can be electrostatically programmed to p-or n-type behavior. This device level reconfigurability is a promising way to enhance the functionality of digital circuits. Here, we present a Verilog-A based Germanium nanowire table model for the analysis of dynamically reconfigurable logic gates. The model is based on TCAD simulations of a nanowire transistor design with feature sizes compatible to a 14nm FinFET process. To showcase that our model enables digital circuit design for reconfigurable operation, performance and power consumption estimations for basic static as well as reconfigurable logic cells are given. Performance improvements over Silicon nanowire based designs are predicted, making Germanium RFETs a promising candidate for future co-integration into standard CMOS processes.


Original languageEnglish
Pages (from-to)728-736
Number of pages9
JournalIEEE transactions on nanotechnology
Publication statusPublished - 2022

External IDs

ORCID /0000-0003-3814-0378/work/142256257



  • Functionally enhanced logic gates, germanium, MIGRFET, reconfigurable transistor, RFET, TIGFET