The ferroelectric field-effect transistor FeFET in its simplest form is a MISFET, where the gate dielectric is replaced by a ferroelectric material. The current in the device is modulated by the gate voltage as in conventional MISFETs, but the threshold voltage of the device depends on the polarization of the ferroelectric layer. In a more realistic scenario, an interfacial layer is sandwiched between the silicon channel and the ferroelectric. However, this solution has several issues. Due to the high permittivity of the ferroelectric layer, the series connection of the ferroelectric layer, the interface oxide, and the depletion layer in the silicon leads to a depolarization field across the ferroelectric thin film, even if no external voltage is applied. This impacts the maximum achievable memory window, retention time, and cycling endurance of the FeFET devices. In this chapter, the basic principles of FeFET realization and its impact on the electrical device performance will be illuminated.