FAIL*: Towards a versatile fault-injection experiment framework

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • Horst Schirmeier - , Dortmund University of Technology (Author)
  • Martin Hoffmann - , Friedrich-Alexander University Erlangen-Nürnberg (Author)
  • Rüdiger Kapitza - , Technical University of Braunschweig (Author)
  • Daniel Lohmann - , Friedrich-Alexander University Erlangen-Nürnberg (Author)
  • Olaf Spinczyk - , Dortmund University of Technology (Author)

Abstract

Many years of research on dependable, fault-tolerant software systems yielded many tool implementations for vulnerability analysis and experimental validation of resilience measures. We identify two disjoint classes of fault-injection (FI) experiment tools in the field, and argue that both are plagued by inherent deficiencies, such as insufficient target state access, little or no means to switch to another target system, and non-reusable experiment code. In this article, we present a novel design approach for a FI infrastructure that aims at combining the strengths of both classes. Our Fail * experiment framework provides carefully-chosen abstractions simplifying both the implementation of different simulator/hardware target backends and the reuse of experiment code, while retaining the ability for deep targetstate access for specialized FI experiments. An exemplary report on first experiences with a prototype implementation based on existing x86 and ARM simulators demonstrates the tool's versatility.

Details

Original languageEnglish
Title of host publicationARCS Workshops, ARCS 2012
PublisherIEEE
Pages1-5
Number of pages5
ISBN (electronic)978-3-88579-294-9
ISBN (print)978-1-4673-1913-3
Publication statusPublished - 29 Feb 2012
Peer-reviewedYes
Externally publishedYes

Conference

Title2012 International Conference on Architecture of Computing Systems, ARCS 2012
Duration28 February - 2 March 2012
CityMunchen
CountryGermany

External IDs

Scopus 84864263013
ORCID /0000-0002-1427-9343/work/167216804

Keywords

ASJC Scopus subject areas

Keywords

  • Registers, Hardware, Prototypes, Computer architecture, Circuit faults, Software, IEEE Computer Society Press