Experimental fabrication of an ESF3 floating gate flash cell in an FD-SOI process
Research output: Contribution to journal › Conference article › Contributed › peer-review
Contributors
Abstract
As minimum feature sizes in semiconductor processes are continuously decreasing, the parallel implementation of embedded non-volatile memory cells becomes increasingly complex for technology nodes below 28 nm. In this publication it is demonstrated the first ESF3 fabrication in an advanced SOI process using the buried oxide as a tunnel oxide. This enables a small cell area of 0.086\ \mu\mathrm{m}^{2} with only few additional process steps and promising electrical data.
Details
Original language | English |
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Pages (from-to) | 356-359 |
Number of pages | 4 |
Journal | European Solid-State Device Research Conference |
Volume | 2022 |
Publication status | Published - 2022 |
Peer-reviewed | Yes |
Conference
Title | 52nd IEEE European Solid-State Device Research Conference, ESSDERC 2022 |
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Duration | 19 - 22 September 2022 |
City | Virtual, Online |
Country | Italy |
External IDs
ORCID | /0000-0003-3814-0378/work/142256244 |
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Keywords
ASJC Scopus subject areas
Keywords
- embedded flash, ESF3, floating gate, MTPM, NVM, SOI