Durchbruchsspannungsverdopplerschaltung

Research output: Intellectual property › Patent application/Patent

Contributors

  • Christian Knochenhauer - , TUD Dresden University of Technology (Inventor)
  • Frank Ellinger - , Chair of Circuit Design and Network Theory (Inventor)
  • Christoph Scheytt - , Leibniz Institute for High Performance Microelectronics (Inventor)

Abstract

The breakdown voltage multiplication circuit has an output stage with two output transistors (T13,T13',T14,T14') in a stacked configuration such that an emitter of an output transistor is connected to a collector of another output transistor. An upper signal path of a primary circuit half is coupled with a lower signal path of a secondary circuit half over a coupling path of a coupling network.

Translated title of the contribution
Breakdown voltage doubler circuit

Details

The breakdown voltage multiplication circuit has an output stage with two output transistors (T13,T13',T14,T14') in a stacked configuration such that an emitter of an output transistor is connected to a collector of another output transistor. An upper signal path of a primary circuit half is coupled with a lower signal path of a secondary circuit half over a coupling path of a coupling network.

Original languageGerman
IPC (International Patent Classification)H03K 19/ 013 A N
Patent numberEP2385627B1
Country/TerritoryGermany
Priority date6 May 2011
Priority numberEP20110165027
Publication statusPublished - 26 Sept 2018
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Keywords

Research priority areas of TU Dresden