Design For Agility: A Modular Reconfigurable Platform for Heterogeneous Many-Core Architectures

Research output: Contribution to book/conference proceedings/anthology/reportConference contributionContributedpeer-review

Abstract

Reconfigurable many-core computing platforms are gaining increasing attention for cloud and edge computing because of their high degree of scalability as well as flexibility. Heterogeneous many-core architectures provide more computing capabilities for domain-specific and general-purpose applications. However, bringing heterogeneous and custom computing elements together increases on-chip communication and run-time management complexities. This leads to growing design time and development cost, in addition to lack of platform re-usability. The scope of this PhD work is the design of a modifiable and modular hardware platform that provides a high degree of agility to change types or specifications of computing elements at design and run-time to achieve the best performance for different application demands using the same platform components. Different acceleration strategies and memory hierarchies are supported. In this paper, the proposed platform, preliminary results, and evaluation are presented targeting FPGAs. Finally, planned and future works are highlighted.

Details

Original languageEnglish
Title of host publicationProceedings - 2021 31st International Conference on Field-Programmable Logic and Applications, FPL 2021
PublisherIEEE Xplore
Pages265-266
Number of pages2
ISBN (electronic)978-1-6654-3759-2
ISBN (print)978-1-6654-4243-5
Publication statusPublished - 2021
Peer-reviewedYes

Publication series

SeriesInternational Conference on Field Programmable Logic and Applications (FPL)
ISSN1946-147X

Conference

Title2021 31st International Conference on Field Programmable Logic and Applications
Abbreviated titleFPL 2021
Conference number31
Duration30 August - 3 September 2021
Locationonline
CityDresden
CountryGermany

External IDs

Scopus 85125803094
ORCID /0000-0003-2571-8441/work/142240584
Mendeley cdb950ac-ce8a-380c-9507-e779e2a4773d

Keywords

Research priority areas of TU Dresden

DFG Classification of Subject Areas according to Review Boards

Keywords

  • FPGAs, Field programmable gate arrays (FPGA), Many-core architecture, Reconfigurable computing