Criticality-aware scrubbing mechanism for SRAM-based FPGAs

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • Rui Santos - , National University of Singapore (Author)
  • Shyamsundar Venkataraman - , National University of Singapore (Author)
  • Anup Das - , National University of Singapore (Author)
  • Akash Kumar - , National University of Singapore (Author)

Abstract

Scrubbing has been considered as an effective mechanism to provide fault-tolerance in Static-RAM (SRAM)-based Field Programmable Gate Arrays (FPGAs). However, the current scrubbing techniques execute without considering the criticality and timing of the user tasks implemented in the FPGA. They often do not execute the scrubbing process in the right instant, which minimizes the probability of each task being executed without transient faults. Moreover, these current solutions are not adapted to the tasks' fault-tolerance requirements, since they may not properly protect the most critical tasks in the system. However, if they do it, they waste resources with the less critical tasks. In this paper, a new scrubbing mechanism is proposed. This new approach adapts the scrubbing mechanism to the tasks' execution, by a proper scheduling and according to their criticality. A proposed heuristic finds a feasible scrubbing schedule for each hardware task. Firstly, the minimum scrubbing periods are computed according to the criticality of each implemented hardware task. Secondly, a proper scrubbing schedule following the EDL (Earliest Deadline as Late as possible) algorithm is found, maximizing the reliability of the system. The experimental results show up to 79% improvements on the system reliability, achieved without wasting scrubbing resources.

Details

Original languageEnglish
Title of host publication2014 24th International Conference on Field Programmable Logic and Applications, FPL 2014
PublisherIEEE Xplore
Number of pages8
ISBN (electronic)9783000446450
Publication statusPublished - 16 Oct 2014
Peer-reviewedYes
Externally publishedYes

Publication series

SeriesInternational Conference on Field Programmable Logic and Applications (FPL)
ISSN1946-147X

Conference

Title2014 24th International Conference on Field Programmable Logic and Applications
Abbreviated titleFPL 2014
Conference number24
Duration1 - 5 September 2014
LocationTechnische Universität München
CityMünchen
CountryGermany

Keywords

Research priority areas of TU Dresden

Library keywords