Complementary High-Voltage Compliant High-Current Output Stages for PoDL
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
This paper presents the design of two complementary high-voltage compliant high-current output stages manufactured in an 0.18 $\mu$m high-voltage CMOS technology. The proposed circuits provide a high-voltage compliant monolithic interface for conventional current-steering digital-to-analog converters in the context of Power over Data Lines (PoDL) for Automotive Ethernet. The proposed output stages differ in their function as current sink or current source. Both are composed of improved active-feedback cascode current mirrors with a very large input to output current ratio of 1:50. The current source is the first reported high-voltage compliant current source featuring this topology in a two-stage design. Both circuits offer the widest reported output range for high-voltage compliant current output stages at 500 mA. With a passband gain of 34 dB, both proposed circuits do also extend the state-of-the-art in terms of the achieved gain-bandwidth product at 544 MHz and 656 MHz respectively.
Details
Original language | English |
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Title of host publication | 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) 2022 |
Publisher | IEEE |
Pages | 313-316 |
Number of pages | 4 |
ISBN (electronic) | 9781665467001 |
ISBN (print) | 978-1-6654-6701-8 |
Publication status | Published - 15 Jun 2022 |
Peer-reviewed | Yes |
Conference
Title | 2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) |
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Duration | 12 - 15 June 2022 |
Location | Villasimius, SU, Italy |
External IDs
Scopus | 85135183810 |
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ORCID | /0000-0002-8653-6361/work/142241975 |
Keywords
Research priority areas of TU Dresden
Keywords
- CMOS technology, Current mirrors, Ethernet, Minimization, Noise cancellation, Passband, Topology