Complementary High-Voltage Compliant High-Current Output Stages for PoDL
Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/Gutachten › Beitrag in Konferenzband › Beigetragen › Begutachtung
Beitragende
Abstract
This paper presents the design of two complementary high-voltage compliant high-current output stages manufactured in an 0.18 $\mu$m high-voltage CMOS technology. The proposed circuits provide a high-voltage compliant monolithic interface for conventional current-steering digital-to-analog converters in the context of Power over Data Lines (PoDL) for Automotive Ethernet. The proposed output stages differ in their function as current sink or current source. Both are composed of improved active-feedback cascode current mirrors with a very large input to output current ratio of 1:50. The current source is the first reported high-voltage compliant current source featuring this topology in a two-stage design. Both circuits offer the widest reported output range for high-voltage compliant current output stages at 500 mA. With a passband gain of 34 dB, both proposed circuits do also extend the state-of-the-art in terms of the achieved gain-bandwidth product at 544 MHz and 656 MHz respectively.
Details
Originalsprache | Englisch |
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Titel | 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) 2022 |
Herausgeber (Verlag) | IEEE |
Seiten | 313-316 |
Seitenumfang | 4 |
ISBN (elektronisch) | 9781665467001 |
ISBN (Print) | 978-1-6654-6701-8 |
Publikationsstatus | Veröffentlicht - 15 Juni 2022 |
Peer-Review-Status | Ja |
Konferenz
Titel | 2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) |
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Dauer | 12 - 15 Juni 2022 |
Ort | Villasimius, SU, Italy |
Externe IDs
Scopus | 85135183810 |
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ORCID | /0000-0002-8653-6361/work/142241975 |
Schlagworte
Forschungsprofillinien der TU Dresden
Schlagwörter
- CMOS technology, Current mirrors, Ethernet, Minimization, Noise cancellation, Passband, Topology