Architecture and Advanced Electronics Pathways Toward Highly Adaptive Energy- Efficient Computing

Research output: Contribution to journalResearch articleContributedpeer-review

Contributors

Abstract

With the explosion of the number of compute nodes, the bottleneck of future computing systems lies in the network architecture connecting the nodes. Addressing the bottleneck requires replacing current backplane-based network topologies. We propose to revolutionize computing electronics by realizing embedded optical waveguides for onboard networking and wireless chip-to-chip links at 200-GHz carrier frequency connecting neighboring boards in a rack. The control of novel rate-adaptive optical and mm-wave transceivers needs tight interlinking with the system software for runtime resource management.

Details

Original languageEnglish
Article number8565890
Pages (from-to)204-231
Number of pages28
JournalProceedings of the IEEE
Volume107
Issue number1
Publication statusPublished - Jan 2019
Peer-reviewedYes

External IDs

Scopus 85058086456
dblp journals/pieee/FettweisDCKBBEF19
ORCID /0000-0002-0757-3325/work/139064759
ORCID /0000-0002-5007-445X/work/141545506
ORCID /0000-0002-5321-9343/work/142236680
ORCID /0000-0001-7008-1537/work/142248613
ORCID /0000-0001-8107-2775/work/142253388
ORCID /0000-0001-8469-9573/work/161890948

Keywords

Sustainable Development Goals

Keywords

  • Adaptable software stack, adaptivity, chip stack, computing, energy efficiency, interconnect, optical communication, wireless communication