Adaptive and transparent cache bypassing for GPUs
Research output: Contribution to book/conference proceedings/anthology/report › Conference contribution › Contributed › peer-review
Contributors
Abstract
In the last decade, GPUs have emerged to be widely adopted for general-purpose applications. To capture on-chip locality for these applications, modern GPUs have integrated multilevel cache hierarchy, in an attempt to reduce the amount and latency of the massive and sometimes irregular memory accesses. However, inferior performance is frequently attained due to serious congestion in the caches results from the huge amount of concurrent threads. In this paper, we propose a novel compile-time framework for adaptive and transparent cache bypassing on GPUs. It uses a simple yet effective approach to control the bypass degree to match the size of applications' runtime footprints. We validate the design on seven GPU platforms that cover all existing GPU generations using 16 applications from widely used GPU benchmarks. Experiments show that our design can significantly mitigate the negative impact due to small cache sizes and improve the overall performance. We analyze the performance across different platforms and applications. We also propose some optimization guidelines on how to efficiently use the GPU caches.
Details
Original language | English |
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Title of host publication | SC '15: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis |
Publisher | Association for Computing Machinery (ACM), New York |
Pages | 1-12 |
Number of pages | 12 |
ISBN (electronic) | 978-1-4503-3723-6 |
Publication status | Published - 15 Nov 2015 |
Peer-reviewed | Yes |
Publication series
Series | SC: The International Conference for High Performance Computing, Networking, Storage, and Analysis |
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Volume | 15-20-November-2015 |
ISSN | 2167-4329 |
Conference
Title | International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2015 |
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Duration | 15 - 20 November 2015 |
City | Austin |
Country | United States of America |
Keywords
Research priority areas of TU Dresden
ASJC Scopus subject areas
Keywords
- cache bypassing, GPUs, thread throttling