A highly linear high-voltage compliant current output stage for arbitrary waveform generation
Research output: Contribution to book/conference proceedings/anthology/report › Conference contribution › Contributed › peer-review
Contributors
Abstract
In this paper, a highly linear high-voltage compliant current output stage is presented. The circuit enables the utilization of a conventional 8 bit low-voltage current-steering digital-to-analog converter in a high-voltage environment. Based on the improved active-feedback cascode current mirror topology, several adaptions were implemented to optimize the circuit towards high linearity and high bandwidth. The proposed circuit provides 167 MHz bandwidth, which to the authors’ knowledge is the highest reported bandwidth for high-voltage compliant current mirrors. Moreover, with 0.49 LSB at 8 bit resolution it has, to the authors’ knowledge, the highest reported linearity to date. Additionally, it is high-voltage compatible for output voltages of up to 60 V and provides the widest output current range of 10 mA maximum output current. At the same time, the power consumption of the utilized cascode control loop was reduced by 92 % compared to the original topology.
Details
Original language | English |
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Title of host publication | International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) and 16th Conference on PhD Research in Microelectronics and Electronics (PRIME) 2021 |
Publisher | VDE Verlag, Berlin [u. a.] |
Pages | 276-279 |
Number of pages | 4 |
ISBN (electronic) | 9783800755899 |
ISBN (print) | 978-3-8007-5588-2 |
Publication status | Published - Jul 2021 |
Peer-reviewed | Yes |
Conference
Title | SMACD / PRIME 2021; International Conference on SMACD and 16th Conference on PRIME |
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Duration | 19 - 22 July 2021 |
Location | online |
External IDs
Scopus | 85117375331 |
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