A design flow for partially reconfigurable heterogeneous multi-processor platforms

Research output: Contribution to book/Conference proceedings/Anthology/ReportConference contributionContributedpeer-review

Contributors

  • Jiashu Li - , National University of Singapore (Author)
  • Anup Das - , National University of Singapore (Author)
  • Akash Kumar - , National University of Singapore (Author)

Abstract

Modern multiprocessor systems-on-chip (MPSoCs) are expected to handle multi-application usecases. As the number and complexity of these applications scale, resource allocation to meet the application throughput requirement is becoming quite a challenge. In this paper, a complete design flow is proposed for partially reconfigurable heterogeneous MPSoC platforms. The proposed flow determines the minimum resources required to map and guarantee the throughput of applications in all use-cases. Further, a suitable mapping for each application is chosen so that energy consumption is minimized. Experiments conducted with a set of synthetic benchmarks and real-life applications clearly demonstrate the advantage of our approach over homogeneous or fully reconfigurable designs. The proposed design flow achieves more than 50% energy savings when the number of configurations is not optimized. With configuration-optimization, our flow results in 75% reduction in the number of configurations with 5% reduction in energy.

Details

Original languageEnglish
Title of host publicationProceedings of the 2012 23rd IEEE International Symposium on Rapid System Prototyping
Pages170-176
Number of pages7
Publication statusPublished - 2012
Peer-reviewedYes
Externally publishedYes

Publication series

SeriesInternational Workshop on Rapid System Prototyping (RSP)
ISSN2150-5500

Conference

Title23rd IEEE International Symposium on Rapid System Prototyping, RSP 2012
Duration11 - 12 October 2012
CityTampere
CountryFinland

Keywords

Research priority areas of TU Dresden

Sustainable Development Goals

Keywords

  • Design-flow, Heterogeneous systems, Multiple use-cases, Partially reconfigurable systems