A Compendium of Logic Gates Based on Reconfigurable Three-Independent-Gate Transistors Realized in FDSOI Hardware
Research output: Contribution to journal › Research article › Contributed › peer-review
Contributors
Abstract
This work presents the electrical characterization of sixteen different logic gates built entirely from three-independent-gate reconfigurable transistors. The circuits are fabricated on full-scale 300 mm wafers using the industrial 22 nm fully depleted silicon-on-insulator process of GlobalFoundries, with only minimal modifications to the baseline CMOS flow. The demonstrations include a reconfigurable 2-2 AND-OR-Inverter gate and a fully functional 1-bit adder comprising eight transistors. Quasi-static and transient on-wafer measurements confirm correct functionality and provide insight into the frequency limitations imposed by the current design and test setup. Finally, to explore scalability, a ripple-carry adder is simulated based on the experimentally realized 1-bit adder, illustrating how scaled devices and optimized layouts could enable low-power, CMOS-compatible applications.
Details
| Original language | English |
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| Journal | Advanced electronic materials |
| Publication status | E-pub ahead of print - 23 Mar 2026 |
| Peer-reviewed | Yes |
External IDs
| ORCID | /0000-0003-3814-0378/work/211721443 |
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Keywords
ASJC Scopus subject areas
Keywords
- ambipolar, digital circuits, process integration, reconfigurable electronics, Schottky barrier FET