A Compact on-Chip IR-Drop Measurement System in 28 nm CMOS Technology
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
A sensor system for measuring the power-ground (PG) noise in very large scale integrated circuits is presented. The proposed system utilizes sensor elements with standard cell dimensions enabling high spatial resolution voltage measurements of power and ground rails. Asynchronous sub-sampling is used to directly convert the analog signals into the digital domain inside the sensors to ensure precise waveform acquisition. Timing signals are derived from a all-digital phase-locked-loop (ADPLL) which guarantees accurate low-noise sampling of the supply waveforms. The sensor system has been implemented in a 28nm CMOS test chip. Simultaneous acquisition of voltage drop and ground bounce at 300 probe points within a 120μm × 120μm macro at 62.5 ps time and up to 250μV voltage resolution shows the capabilities of both, high spatial and high temporal resolution measurement of PG noise.
Details
| Original language | English |
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| Title of host publication | 2014 International Conference on Circuits and Systems (ISCAS) |
| Publisher | IEEE Xplore |
| Pages | 1219-1222 |
| Number of pages | 4 |
| ISBN (electronic) | 978-1-4799-3432-4 |
| Publication status | Published - 2014 |
| Peer-reviewed | Yes |
Publication series
| Series | IEEE International Symposium on Circuits and Systems (ISCAS) |
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| ISSN | 0271-4302 |
External IDs
| Scopus | 84907401425 |
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Keywords
Keywords
- CMOS digital integrated circuits, VLSI, digital phase locked loops, electric sensing devices, noise measurement, ADPLL, CMOS technology, CMOS test chip, PG noise measurement, all-digital phase-locked-loop, analog signal-digital domain convertion, asynchronous sub-sampling, compact on-chip IR-drop measurement system, ground bounce, ground rail, low-noise sampling, power rail, power-ground noise measurement, sensor element, sensor system, size 28 nm, spatial resolution voltage measurement, standard cell dimensions, supply waveform, time 62.5 ps, timing signals, very-large-scale integrated circuits, voltage drop, voltage resolution, waveform acquisition, Clocks, Noise, Noise measurement, Rails, Semiconductor device measurement, Standards, Voltage measurement