A call-up for circuit-switched NoCs in the Dark-Silicon Era
Research output: Contribution to conferences › Paper › Contributed › peer-review
Contributors
Details
| Original language | English |
|---|---|
| Pages | 1-6 |
| Number of pages | 6 |
| Publication status | Published - 2017 |
| Peer-reviewed | Yes |
External IDs
| Scopus | 85045724671 |
|---|---|
| ORCID | /0000-0003-2571-8441/work/142240426 |
Keywords
Sustainable Development Goals
Keywords
- elemental semiconductors, integrated circuit design, multilayers, silicon, dark silicon era, energy-efficiency, future NoC, multicore chips, future many-cores, Synopsys Design Compiler, SAED90nm technology, size 90 nm, Si, Libraries, Multicore processing, Optimization, Power demand, Dark-Silicon, Energy, energy conservation, multiprocessing systems, network-on-chip, mixed Vth double layered design, layer switching, total chip power, low complexity energy-efficient solution, supply levels, multilayered-CS-NoC architecture, single-layer single supply CS-NoC, Energy efficiency, Threshold voltage, Frequency synthesizers, Circuit-Switching, NoC