A call-up for circuit-switched NoCs in the Dark-Silicon Era

Publikation: Beitrag zu Konferenzen › Paper › Beigetragen › Begutachtung

Beitragende

Scopus	85045724671
ORCID	/0000-0003-2571-8441/work/142240426

elemental semiconductors, integrated circuit design, multilayers, silicon, dark silicon era, energy-efficiency, future NoC, multicore chips, future many-cores, Synopsys Design Compiler, SAED90nm technology, size 90 nm, Si, Libraries, Multicore processing, Optimization, Power demand, Dark-Silicon, Energy, energy conservation, multiprocessing systems, network-on-chip, mixed Vth double layered design, layer switching, total chip power, low complexity energy-efficient solution, supply levels, multilayered-CS-NoC architecture, single-layer single supply CS-NoC, Energy efficiency, Threshold voltage, Frequency synthesizers, Circuit-Switching, NoC