A 1-V 299/spl mu/W Flashing UWB Transceiver Based on Double Thresholding Scheme
Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review
Contributors
Abstract
This paper presents an ultra-wideband transceiver based on a newly proposed double thresholding scheme. The scheme does not require any precise synchronization and thus is practical in ad-hoc networks. The proposed architecture has high noise and multi-path fading signal immunities. All analog blocks are activated in a short period called 'flashing' to suppress total average power. A tested chip is manufactured using 0.15mum FD-SOI CMOS technology. The measured average power is 299muW at 25kbps data-rate over the distance of 35cm
Details
Original language | English |
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Title of host publication | 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. |
Publisher | IEEE |
Pages | 202-203 |
Number of pages | 2 |
ISBN (print) | 1-4244-0006-6 |
Publication status | Published - 17 Jun 2006 |
Peer-reviewed | Yes |
Conference
Title | 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. |
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Duration | 15 - 17 June 2006 |
Location | Honolulu, HI, USA |
External IDs
Scopus | 39749165174 |
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ORCID | /0000-0002-4152-1203/work/165453385 |
Keywords
Keywords
- Transceivers, Pulse amplifiers, Wireless sensor networks, Circuit noise, Frequency synchronization, Clocks, Signal generators, Space vector pulse width modulation, Ultra wideband technology, Ad hoc networks