A 1-V 299/spl mu/W Flashing UWB Transceiver Based on Double Thresholding Scheme

Publikation: Beitrag in Buch/Konferenzbericht/Sammelband/GutachtenBeitrag in KonferenzbandBeigetragenBegutachtung

Beitragende

Abstract

This paper presents an ultra-wideband transceiver based on a newly proposed double thresholding scheme. The scheme does not require any precise synchronization and thus is practical in ad-hoc networks. The proposed architecture has high noise and multi-path fading signal immunities. All analog blocks are activated in a short period called 'flashing' to suppress total average power. A tested chip is manufactured using 0.15mum FD-SOI CMOS technology. The measured average power is 299muW at 25kbps data-rate over the distance of 35cm

Details

OriginalspracheEnglisch
Titel2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.
Herausgeber (Verlag)IEEE
Seiten202-203
Seitenumfang2
ISBN (Print)1-4244-0006-6
PublikationsstatusVeröffentlicht - 17 Juni 2006
Peer-Review-StatusJa

Konferenz

Titel2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.
Dauer15 - 17 Juni 2006
OrtHonolulu, HI, USA

Externe IDs

Scopus 39749165174
ORCID /0000-0002-4152-1203/work/165453385

Schlagworte

Schlagwörter

  • Transceivers, Pulse amplifiers, Wireless sensor networks, Circuit noise, Frequency synchronization, Clocks, Signal generators, Space vector pulse width modulation, Ultra wideband technology, Ad hoc networks