A 0.5-V sigma-delta modulator using analog T-switch scheme for the subthreshold leakage suppression

Research output: Contribution to book/Conference proceedings/Anthology/Report › Conference contribution › Contributed › peer-review

Contributors

Abstract

A 0.5-V sigma-delta modulator implemented in a 0.15-mum FD-SOI process with low VTH of 0.1V using analog T-switch (AT-switch) scheme to suppress subthreshold-leakage problems is presented. The scheme is compared with the conventional circuit, which are also fabricated in the same chip. The measurement result demonstrates that the sigma-delta modulator based on AT-switch realizes 6-bit resolution through reducing nonlinear leakage effects while the conventional circuit can achieve 4-bit resolution

Details

Original languageEnglish
Title of host publicationAsia and South Pacific Conference on Design Automation, 2006.
PublisherIEEE
ISBN (print)0-7803-9451-8
Publication statusPublished - 27 Jan 2006
Peer-reviewedYes

Conference

TitleAsia and South Pacific Conference on Design Automation, 2006.
Duration24 - 27 January 2006
LocationYokohama, Japan

External IDs

ORCID /0000-0002-4152-1203/work/165453383

Keywords

Keywords

  • Delta-sigma modulation, Subthreshold current, Variable structure systems, Very large scale integration, Semiconductor device measurement, Digital circuits, Threshold voltage, Logic, Analog circuits, Circuit synthesis