1/f noise analysis of a 75 nm twin-flash™ technology non-volatile memory cell
Research output: Contribution to conferences › Paper › Contributed › peer-review
Contributors
Abstract
Analyzing the electrical degradation of modern flash memory cells by conventional C-V or charge pumping techniques is hardly possible due to the extremely small gate area. However, l/f noise measurements can be done since low frequency 1/f noise in the range around 1 Hz produced by stress-generated oxide traps strongly increases in MOSFETs with shrinking area. Here we show that measurements of the noise power spectral density enable the investigation of the degradation of the devices caused by hot carrier stress during write/erase cycling. In particular, we demonstrate that the oxide trap generation of a multi-bit cell like the Twin-Flash™ cell is mainly located at the stressed bit region.
Details
Original language | English |
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Pages | 12-15 |
Number of pages | 4 |
Publication status | Published - 2006 |
Peer-reviewed | Yes |
Externally published | Yes |
Conference
Title | 7th Annual Non-Volatile Memory Technology Symposium, NVMTS 2006 |
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Duration | 5 - 8 November 2006 |
City | San Mateo, CA |
Country | United States of America |
External IDs
ORCID | /0000-0003-3814-0378/work/156338381 |
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Keywords
ASJC Scopus subject areas
Keywords
- Flicker noise, Hot carrier injection, Oxide degradation, Trapped charge storage devices, Twin-flash